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EEE120: Digital Design Fundamentals – 4 credits

Designing digital subsystems, using individual components, Small and Medium Scale Integration (SSI/MSI) and state machines (sequential logic). Covering Number systems, conversion methods, binary and complement arithmetic, Boolean algebra, and circuit minimization techniques. Analysis and design of combinational logic, flip-flops, counters, registers, Read Only Memory (ROMs), Programmable Logic Devices (PLDs), asynchronous and synchronous sequential circuits, and Mealy/Moore design simplifications. Building physical circuits. Prerequisites: None. Corequisites: (CSC100, or CSC100AA, or CSC100AB, or CSC110, or CSC110AA, or CSC110AB), or permission of Instructor or Division or Department Chair.

General Education Designations: Computer/Statistics/Quantitative Application [CS]

Class# Location Delivery Dates Days Times Instructors Availability
18594
Scottsdale
CIS/Math Bldg. CM 469
Hybrid In-Person
9/9 – 12/18
Fall 2026
W
2:30PM – 4:25PM
  • J. Jackson
Open
21 of 24 seats available
  • Costs include EEE Course Fee: $5.00
  • This course requires the use of a computer or mobile device with internet access and speakers.
    Low-Textbook-Cost Class: The total cost of the required materials for this course is $40 or less.
  • Textbook info pending